SCHEDULE: NOV 10-16, 2007

HPC Challenge (HPCC) Benchmark Suite

Session: S09

Event Type: Tutorial

Time: 8:30am - 12:00pm

Presenter(s): Jack Dongarra, Piotr Luszczek, Allan Snavely

Location: A1

Abstract:
In 2003, the DARPA's High Productivity Computing Systems released the HPCC suite. It examines the performance of HPC architectures using kernels with various memory access patterns of well understood computational kernels. Consequently, HPCC results bound the performance of real applications as a function of memory access characteristics and define performance boundaries of HPC architectures. The suite was intended to augment the TOP500 list and by now the results are publicly available for 6 out of 10 of the world's fastest supercomputers. Implementations exist in most of the major high-end programming languages and environments, accompanied by countless optimization efforts. The increased publicity enjoyed by HPCC doesn't necessarily translate into deeper understanding of the performance metrics that HPCC measures. And so this tutorial will introduce attendees to HPCC, provide tools to examine differences in HPC architectures, and give hands-on training that will hopefully lead to better understanding of parallel environments.

Introductory: 30% Intermediate: 40% Advanced: 30%

Chair/Presenter Details:

Jack Dongarra
University of Tennessee

Piotr Luszczek
University of Tennessee

Allan Snavely
San Diego Supercomputer Center

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